1. Field of the Invention
The present invention relates to an electrically rewriteable/erasable semiconductor memory device, and more particularly to a non-volatile semiconductor memory having peripheral circuits constituted by high voltage transistors.
2. Description of the Related Art
In a NAND type EEPROM, a type of nonvolatile semiconductor memory device, a high voltage programming write-in voltage Vpgm is applied to the word line during NAND cell programming. The programming write-in voltage Vpmg is supplied by the word line drive signal lines CG0 to CGm (m is a natural number). A word line transmission transistor is disposed in between the word line drive signal lines CG0 to CGm and the word lines WL0 to WLm, and executes switching that controls whether or not the programming voltage Vpmg is transferred to the word lines WL0 through WLm according to the program selected/un-selected blocks. The word line transfer transistor must be able to cut off a programming voltage Vpmg of approximately 20V, and so it must be a transistor that possesses a high breakdown voltage. However, in order to increase the value of the breakdown voltage, things like the gate length and the distance between the gate electrode and the contact must be set wider, which presents the problem of increased surface area of the semiconductor chip (see, for instance, Japanese Patent Application Laid-open No. 2002-141477, in particular, FIG. 7.).